Technical library

WarpStack white papers

A growing series of short technical notes behind WarpStack. Each one takes a single method, states the package it was measured on, shows the tables and figures, and sets out the scope and caveats — so every number on the capabilities page can be read in full here.

No. 01
Fidelity · numerical

High-fidelity at various resolution

Resolution is an input, not a result. On a production-class AMD MI350-class accelerator package, peak-to-peak warpage moves 0.33% across a 2.25× refinement range and the whole deflected field is unchanged to the width of a plotted line — so a resolution that runs in 11 minutes on a laptop already carries the answer a ~0.9 TB, day-long solve would return. Includes the convergence evidence, the surface-by-surface agreement, and the projected cost of the fine mesh we did not need to solve.

±0.55% total uncertainty 1.43 M DOF AMD MI350-class
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No. 02
Global exploration · AI

WarpStack-GNN — sweep the whole design space

A graph neural network trained on WarpStack's own 3D output returns the full warpage map in 19.4 ms — 2,146× faster than solving the same package in 3D, at 0.49% whole-map difference against independent 3D solves. Scored on 512 held-out material and thermal configurations it was never shown. Includes the accuracy tables, the per-design training cost, and the break-even point.

19.4 ms per design 512 held-out points 2nm CoWoS
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No. 03
Localized exploration · compact model

WarpStack-MOR — localized design-space exploration

A physics-based compact model built once over a bounded box around a nominal design — not a fit to data — carrying a rigorous error bound. On a what-if outside the box (ABF substrate stiffened 24.0→28.8 GPa, +40.9 µm of bow) it tracks the full 3D solve to within 0.036 µm while running in 51 µs — 798,000× faster. Includes the method agreement, the eight-point validation, and the cost model.

51 µs per design within 0.036 µm error bound attached
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More white papers will be added to this series as the methods and the measured designs grow. The three above share a design description, a thermal load, and a result format — so the methods they document are interchangeable on the same inputs.

Put warpage in the loop.

WarpStack is in active development. Request a demo or a walkthrough on your own 2.5D/3D chiplet designs, and we'll get you set up.

noveetyai@noveetymanagement.com