White paper series

MetalStack white papers

Everything technical about MetalStack lives here rather than on the product page: the method, the designs each claim was measured on, and the full tables and figures. Each paper stands on its own and states exactly what was run.

WP-01 / VALIDATION

Full-chip EM, TM and IR-drop validation

What MetalStack Core found across six industrial power grids at 32/28 nm: voltage drop when new and after aging, time to failure and runtime. Includes the two designs that pass every check you would run today and still fail inside a year, the effect of where the heat sits, and how far lifetime moves with manufacturing spread.

Read WP-01

WP-02 / AI ACCELERATION

AI-accelerated reliability analysis

How MetalStack-AI turns a variation-aware reliability analysis from an overnight job into a 20-second one, measured against the numerical engine across five structure sizes — and what that speed costs in accuracy. The method is published and peer-reviewed at ICCAD 2024.

Read WP-02

WP-03 / IN PREPARATION

MetalStack in an agentic design flow

Driving EM and IR-drop sign-off from a scripted loop: what to expose to an optimizer, how to budget exact against AI-accelerated runs, and what closing the loop changes about the power grid you ship.

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THE SERIES

Ask for the paper you need

Forthcoming papers will cover transient workload benchmarking and multi-corner sign-off. Each one is self-contained and states exactly what was run, on which designs, with which engine.

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From the evidence to your design

Run it on a grid you actually care about.

The fastest way to judge the tool is on your own power grid. Send us a design, or tell us what you are taping out and on which flow, and we will walk you through a run end to end.

Request a demo