About the data. Areas, cell counts, timing, wirelength, power and DRC
figures are taken from the reports each tool produced — Fusion Compiler
report_design and report_qor summaries, Innovus
time_design and report_summary reports, and the OpenROAD flow's
per-stage metrics files.
About the images. OpenROAD designs show the flow's own layout renderings
alongside a KLayout rendering of the final 6_final.gds tape-out database.
Synopsys, Cadence and OpenLane designs show layouts captured from the tool GUIs.
Technology notes. ASAP7 is a predictive 7 nm FinFET kit, and
FreePDK45/Nangate45, the Synopsys SAED32 EDK and the Cadence GPDK045 generic kit are
academic kits for research and teaching.
SKY130 and GF180MCU are open-source PDKs for manufacturable foundry processes.
License. The layout images and design descriptions are
CC BY 4.0 — free to reuse with credit to VSCLAB,
UC Riverside. The site source and generator scripts are MIT.
The circuits, PDKs and tools behind these figures belong to their own authors and keep
their own terms, some of which require attribution — NOTICE.md
lists the origin and license of every design and PDK shown here.