Full-chip reliability, numerical + AI

Temperature-aware EM, TM & IR-drop analysis for the full chip

MetalStack tells you where your power grid will fail and when — accounting for electromigration, thermomigration, and IR-drop together, on the full chip. Two engines share the same physics: one exact enough to sign off on, one fast enough to run on every iteration.

up to 86×
faster with AI
<0.05%
difference vs. exact
6
designs validated

Full-chip failure map

Where the damage builds across a real power grid
healthy at risk hotspot failure point
Why MetalStack

Physics-exact where it must be. AI-accelerated where it pays.

Classic electromigration rules are over-conservative, so designs get overbuilt to pass them. MetalStack replaces the rules with real physics — the actual heat, current, and stress your chip will see — and then makes that analysis fast enough to run whenever you want it, not just once at the end.

EM + TM + IR
One coupled analysis, not three disconnected tools
2
Engines — one physics-exact, one AI-accelerated
145×
Faster reliability analysis than commercial tools
EDA
Works with OpenROAD and Synopsys flows
How MetalStack is built

One physics. Two engines.

Same physics, two ways to run it. Pick the one your task needs — or use both: explore fast with AI, confirm with the numerical engine.

Engine 1 · Numerical

MetalStack Core

Your golden reference for full-chip sign-off.

  • Physics-exact. Every result traces back to first-principles simulation you can defend in a review.
  • Full chip, not samples. Validated on six industrial-scale designs, up to 10,900 nodes per net.
  • Sees aging happen. Watch IR-drop degrade over the product lifetime and know exactly when it crosses your limit.
Use it for: sign-off, lifetime guarantees, reliability reports.
Engine 2 · AI-accelerated

MetalStack-AI (PINN)

The same answers, fast enough to use every day.

  • Up to 86× faster than the numerical engine, and up to 243× faster than commercial tools.
  • Within 0.05% of the reference. Speed that costs you accuracy isn't speed you can use.
  • Answers in a range, not a number. Real manufacturing variation built in, so you see best case and worst case together.
Use it for: design exploration, what-if sweeps, automated design loops.

The AI engine isn't a black box — it's measured against the real one. MetalStack-AI is built and checked against MetalStack Core, so every fast answer comes with a known margin against physics-exact results, and anything important can be re-run the slow way to confirm. That's the difference between AI you can sign off on and AI you can only explore with.

Capabilities

What MetalStack can do

Everything you need to know whether your power grid survives its service life — and what to change if it doesn't.

One coupled analysis

Electromigration, thermomigration, and IR-drop analyzed as one connected problem — because on real silicon they are one connected problem.

Your chip's real heat map

Feed MetalStack the real temperature map of your chip, including measured profiles. Where the hotspots sit matters more than how hot the die runs on average.

Self-heating, captured

Wires heat themselves as current flows through them. MetalStack finds those local hotspots instead of averaging them away.

Aging that feeds back

As wires age and degrade, the analysis updates itself — so you see how the power grid actually behaves years into the product's life, not just on day one.

Lifetime with odds attached

Get lifetime as a range with real odds attached, not a single pessimistic number you have to guess a margin around.

Fits your existing flow

Drops into the flow you already run — open-source OpenROAD or Synopsys ICC / Fusion Compiler. Validated on six industrial-scale designs.

The MetalStack-AI AI engine

An AI engine that learns the physics rather than memorizing past results — so it stays accurate on designs it has never seen. Up to 86× faster, within 0.05% of the reference.

Confidence, built in

Every answer arrives with its own confidence range attached — no separate statistical run, and 145× faster than the commercial-tool equivalent.

Built for real-world variation

Manufacturing spread, temperature swings, and changing workloads are part of the model — so you design for what will actually ship, not the worst corner stacked on worst corner.

Agentic-ready

Fully agentic-flow aware

Every input and output is scriptable, so MetalStack plugs straight into automated and AI-driven design flows — closing the loop on IR-drop and EM sign-off without a human in the middle.

The workflow

Point it at your design. Get an answer.

No new methodology to learn and no model to hand-build — MetalStack takes the power grid you already have and tells you where it fails, and when.

Hand it your design

The power grid from your existing layout, plus a heat map if you have one.

It skips what can't fail

A fast first pass sets aside the nets that will never break, so the real compute goes where the risk is.

It ages your chip

MetalStack runs your grid forward through its service life, tracking how heat, current, and wear compound on each other.

You get the failure picture

Where voids form, how far IR-drop has drifted, and the date your design crosses the limit you set.

AI

Or run it the fast way

Switch on MetalStack-AI and the same analysis returns in seconds instead of hours — same inputs, same outputs, no change to how you work.

Accuracy

Catches early failures

Vias are where power grids break first. MetalStack keeps watching them the whole time a void grows, instead of writing them off at the first sign of damage.

Scale

Built for full chips

The largest validated design — 208 nets, up to 10,900 nodes each — completes in about 30 seconds. Small blocks finish in under two.

AI engine

Learns physics, not examples

MetalStack-AI is trained on the governing physics itself, so it holds up on designs it has never seen — the usual failure mode of AI tools trained only on past results.

AI engine

Trained once, reused forever

Training happens on our side, once. You get inference — seconds per run, no GPU cluster and no data-collection project on your end.

MetalStack-AI (PINN) · the AI engine

Hours of analysis, done in seconds

Understanding how manufacturing variation affects chip lifetime is the most expensive question a reliability flow can ask — which is why most teams skip it. MetalStack-AI makes it routine. Here is the same analysis run three ways, on structures from small to large.

86×
Faster than our own numerical engine
243×
Faster than commercial tools
<0.05%
Difference from the physics-exact answer
<1s
Per run, even on the largest structures
Time to complete a full variation-aware reliability analysis, small structures to large.
Structure size Commercial tool MetalStack MetalStack-AI Speedup Difference
Small22 min7.6 min0.25 s86×0.02%
Medium37 min12.7 min0.43 s77×0.03%
Large50 min17.2 min0.39 s63×0.03%
Very large60 min22.2 min0.61 s46×0.04%
Largest69 min25.4 min0.80 s36×0.04%

An hour of waiting becomes 20 seconds

Full variation-aware reliability analysis, end to end
MethodTimeSpeedup
Commercial tool48 min
MetalStack17 min2.8×
MetalStack-AI20 sec145×

That is the difference between an analysis you schedule overnight and one you run every time you change the design.

Speed you don't pay for in accuracy

How far MetalStack-AI sits from the physics-exact answer
0.02%
Typical difference on a single wire
0.04%
Worst case across every structure tested

Four hundredths of a percent, on structures with hundreds of segments. For every decision you'd make from this analysis, the fast answer and the exact answer are the same answer.

Published and peer-reviewed at ICCAD 2024 (read the paper). Commercial-tool comparison run against COMSOL. The engine named “EMSpice” in the paper is MetalStack.

Results

Average temperature hides the answer

Two chips running at the same average temperature can have completely different lifetimes. What matters is where the heat sits relative to where the current flows — and that is exactly what rule-based EM checks cannot see.

RISC-V core

Same design, seven different heat patterns
Heat patternAverageHotspotNets at riskLifetime
Flat 353K353K353K75.0 months
Self-heating, cool321K346K1411.5 months
Self-heating, typical353K387K189.4 months
Self-heating, hot374K407K185.5 months
Measured chip, cool310K337K127.1 months
Measured chip, typical353K388K16passes
Measured chip, hot373K408K16passes

Look at rows three and six: same average temperature, same peak temperature, opposite outcomes. One design fails in nine months. The other passes. The only difference is where the hotspot lands.

ARM Cortex-A core

A design already running hard — and what that costs
Heat patternAverageHotspotNets at riskLifetime
Flat 353K353K353K2074.0 months
Self-heating, cool320K353K2064.0 months
Self-heating, typical353K385K2064.0 months
Self-heating, hot373K406K2064.0 months
Measured chip, cool310K342K2063.8 months
Measured chip, typical353K385K2063.8 months
Measured chip, hot373K406K2063.8 months

This design carries so much current that almost every net is at risk no matter how you cool it — the lifetime barely moves across a 60-degree range. Cooling won't save this one; the grid needs redesigning, and MetalStack shows you that before tape-out.

How much does manufacturing spread matter?

100 runs per design, with realistic material variation
±16%
Lifetime spread — RISC-V core
±0.006%
Lifetime spread — ARM core

It depends entirely on the design — which is why you have to measure it. The RISC-V core's lifetime swings between 7 and 15 months depending on how the silicon comes out. The ARM core lands in the same place every time. Guessing a margin would leave one over-designed and the other exposed.

Even the exact engine is fast

Speedup from built-in acceleration, with identical results
Dual RAM
1.50×
ARM logic core
1.29×
JPEG codec
1.26×
AES engine
1.21×
RISC-V core
1.21×
ARM pad ring
1.18×

Acceleration that changes your answer isn't worth having. These runs return identical lifetime and IR-drop numbers to the unaccelerated solve — the speed is free.

Proven on real designs

Six industrial-scale designs, start to finish

Not toy test cases — real power grids pulled from Synopsys Fusion Compiler at 32/28 nm.

What MetalStack found in each design, and how long it took.
DesignSizeVoltage drop, newVoltage drop, aged LifetimeAnalysis time
AES engine97 nets6.1%6.9%passes3.8 s
ARM pad ring68 nets0.3%0.3%passes2.0 s
JPEG codec178 nets6.6%6.8%passes12.9 s
Dual RAM55 nets0.1%0.1%passes1.6 s
RISC-V core186 nets6.2%29.6%9.4 months4.5 s
ARM logic core208 nets8.9%22.2%4.0 months31.5 s

Two things stand out. First, speed: the largest design finishes in half a minute, the smallest in under two seconds — this is analysis you can run on every iteration, not once before tape-out. Second, where the risk hides: the RISC-V core looks healthy at 6.2% voltage drop on day one, then degrades to 29.6% — and only 18 of its 186 nets are responsible. A handful of overloaded wires can take down a grid that passes every check you'd run today.

Get started

Find the failures before your customers do

MetalStack is available now for evaluation. Bring us a design and we'll show you what it finds.